protocol.txt 33 KB

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  1. Interface Communication Protocol
  2. Version DBS 1.8
  3. Originally taken from the X10 web page Dec 25, 1996.
  4. Some mistakes corrected. DBS Jan 1, 1997
  5. Updated Jan 24 to match the Jan 6th version of X10's doc. The main
  6. difference was the cable pin-out.
  7. Updated Feb 13, 2000 to add info about the HAIL command.
  8. Updated Aug 24, 2001 by Charles W. Sullivan (cwsulliv@triad.rr.com)
  9. to include identification of CM11a timer bits for Security mode,
  10. clarification of "All xxx" command macro element format and termination
  11. of macro initiator table.
  12. Updated Sep 1, 2002 by Charles W. Sullivan to clarify operation of
  13. the battery timer and correct the definitions of bits 0-3 in the
  14. section 8 "Set Interface Clock" block.
  15. Updated May 19, 2003 by Charles W. Sullivan to correct the format
  16. for extended code commands (per Buzz Burrowes), clarify the format
  17. of extended code macro elements and add a note regarding suppression
  18. of address byte transmission in macro elements.
  19. Updated Nov 4, 2003 by Charles W. Sullivan to add note regarding
  20. the effect of having the same time for the start and stop event
  21. in a timer.
  22. Updated Mar 7,2004 by Charles Sullivan to add note regarding
  23. usage of bits 12-14 in the macro initiator.
  24. 1. X-10 Transmission Coding (overview).
  25. 1.1 Housecodes and Device Codes.
  26. The housecodes and device codes range from A to P and 1 to 16
  27. respectively although they do not follow a binary sequence. The encoding
  28. format for these codes is as follows
  29. Housecode Device Code Binary Value Hex Value
  30. A 1 0110 6
  31. B 2 1110 E
  32. C 3 0010 2
  33. D 4 1010 A
  34. E 5 0001 1
  35. F 6 1001 9
  36. G 7 0101 5
  37. H 8 1101 D
  38. I 9 0111 7
  39. J 10 1111 F
  40. K 11 0011 3
  41. L 12 1011 B
  42. M 13 0000 0
  43. N 14 1000 8
  44. O 15 0100 4
  45. P 16 1100 C
  46. 1.2 Function Codes.
  47. Function Binary Value Hex Value
  48. All Units Off 0000 0
  49. All Lights On 0001 1
  50. On 0010 2
  51. Off 0011 3
  52. Dim 0100 4
  53. Bright 0101 5
  54. All Lights Off 0110 6
  55. Extended Code 0111 7
  56. Hail Request 1000 8
  57. Hail Acknowledge 1001 9
  58. Pre-set Dim (1) 1010 A
  59. Pre-set Dim (2) 1011 B
  60. Extended Data Transfer 1100 C
  61. Status On 1101 D
  62. Status Off 1110 E
  63. Status Request 1111 F
  64. NOTE: The only devices that I own that respond to the status request
  65. command are the RR501 RF receivers. If anyone knows of others I'd like
  66. to hear about them.
  67. 2. Serial Parameters.
  68. The serial parameters for communications between the interface and PC
  69. are as follows:
  70. Baud Rate: 4,800bps
  71. Parity: None
  72. Data Bits: 8
  73. Stop Bits: 1
  74. 2.1 Cable connections:
  75. Signal DB9 Connector RJ11 Connector
  76. SIN Pin 2 Pin 1
  77. SOUT Pin 3 Pin 3
  78. GND Pin 5 Pin 4
  79. RI Pin 9 Pin 2
  80. where: SIN Serial input to PC (output from the interface)
  81. SOUT Serial output from PC (input to the interface)
  82. GND Signal ground
  83. RI Ring signal (input to PC)
  84. 3. X-10 Transmission.
  85. 3.1. Standard Transmission.
  86. An X-10 transmission from the PC to the interface typically refers to
  87. the communication of a Housecode and Device Code combination or the
  88. transmission of a function code. The format of these transmissions is:
  89. PC Interface
  90. 2 bytes Header:Code
  91. 1 byte checksum
  92. 1 byte Acknowledge
  93. 1 byte interface ready to receive
  94. This format is typical of all transmissions between the PC and the
  95. interface with the difference being in the first transmission from the
  96. PC.
  97. 3.1.1. Header:Code.
  98. The Header:Code combination is configured thus:
  99. Bit: 7 6 5 4 3 2 1 0
  100. Header: < Dim amount > 1 F/A E/S
  101. Where:
  102. Dim amount (dims) is a value between 0 and 22 identifying the number of dims to
  103. be transmitted (22 is equivalent to 100%)
  104. Bit 2 is always set to '1' to ensure that the interface is able to
  105. maintain synchronization.
  106. F/A defines whether the following byte is a function (1) or address (0).
  107. E/S defines whether the following byte is an extended transmission (1)
  108. or a standard transmission (0).
  109. Bit: 7 6 5 4 3 2 1 0
  110. Address: < Housecode > <Device Code>
  111. Function:< Housecode > < Function >
  112. Note the function only operates for devices addressed with the same Housecode.
  113. 3.1.2. Interface Checksum and PC Acknowledge
  114. When the interface receives a transmission from the PC, it will sum all
  115. of the bytes, and then return a byte checksum. If the checksum is
  116. correct, the PC should return a value of 0x00 to indicate that the
  117. transmission should take place. If however, the checksum is incorrect,
  118. then the PC should again attempt to transmit the Header:Code combination
  119. and await a new checksum.
  120. 3.1.3. Interface Ready to Receive.
  121. Once the X-10 transmission has taken place (and this may be quite time
  122. consuming in the case of Dim or Bright commands) the interface will send
  123. 0x55 to the PC to indicate that it is in a 'ready' state.
  124. 3.1.4. Example.
  125. PC Interface Description
  126. 0x04,0x66 Address A1
  127. 0x6a Checksum ((0x04 + 0x66)&0xff)
  128. 0x00 OK for transmission.
  129. 0x55 Interface ready.
  130. 0x04,0x6e Address A2
  131. 0x72 Checksum ((0x04 + 0x6e)&0xff)
  132. 0x00 OK for transmission.
  133. 0x55 Interface ready.
  134. 0x86,0x64 Function: A Dim 16/22*100%
  135. 0xe0 Incorrect checksum.
  136. 0x86,0x64 Function re-transmission
  137. 0xea Checksum ((0x86 + 0x64)&0xff)
  138. 0x00 OK for transmission.
  139. 0x55 Interface ready.
  140. This transmission will address lamp modules A1 and A2, and then dim them
  141. by 72%. Note multiple addresses cannot be made across housecodes, i.e.
  142. A1, B2 Dim 72% is not valid, and would result in B2 being dimmed by
  143. 72%.
  144. 3.2. Extended X-10 Transmission.
  145. Extended X-10 transmission is simply an extension of the protocol to
  146. allow two additional bytes of extended data to be transmitted. In this
  147. case, the protocol may be shown as:
  148. PC Interface
  149. 5 bytes Header:Function:Unitcode:Data:Command
  150. 1 byte checksum
  151. 1 byte Acknowledge
  152. 1 byte interface ready to receive
  153. (Corrected by CWS per input from Buzz Burrowes. The original specified
  154. only 4 bytes.)
  155. The header for an extended transmission is always:
  156. Bits: 7 6 5 4 3 2 1 0
  157. Header: 0 0 0 0 0 1 1 1
  158. Bits 7 to 3 are always zero because the dim level is not applicable to
  159. extended transmissions.
  160. Bit 2 must be set to '1' as in all PC header transmissions.
  161. Bit 1 is set to '1' as the extended transmission is always a function.
  162. Bit 0 is set to '1' to define an extended transmission rather than a
  163. standard transmission.
  164. The function byte is:
  165. Bits: 7 6 5 4 3 2 1 0
  166. Function: < Housecode > 0 1 1 1
  167. Again, the housecode must be the same as any previously addressed
  168. modules, and for extended data, the function code must be 0111.
  169. The unitcode byte contains the encoded unit in the lower nybble.
  170. Finally, the data and command bytes may take any value between 0x00 and 0xff.
  171. Note that the checksum is one byte and is defined as:
  172. checksum = (header + function + unitcode + data + command)&0xff
  173. 4. X-10 Reception.
  174. Whenever the interface begins to receive data from the power-line, it
  175. will immediately assert the serial ring (RI) signal to initiate the
  176. wake-up procedure for the PC. Once the data reception is complete, the
  177. interface will begin to poll the PC to upload its data buffer (maximum
  178. 10 bytes). If the PC does not respond, then the interface's data buffer
  179. will overrun, and additional data will not be stored within the buffer.
  180. 4.1. Interface Poll Signal.
  181. In order to poll the PC, the interface will continually send:
  182. bits: 7 6 5 4 3 2 1 0
  183. Poll: 0 1 0 1 1 0 1 0 (0x5a)
  184. This signal will be repeated once every second until the PC responds.
  185. 4.2. PC Response to the Poll Signal.
  186. To terminate the interface's polling and initiate the data transfer, the
  187. PC must send an acknowledgment to the interface's poll signal. This
  188. acknowledgment is:
  189. bits: 7 6 5 4 3 2 1 0
  190. Ack : 1 1 0 0 0 0 1 1 (0xc3)
  191. Notice that bit #2 of the PC transmission is not set, indicating that
  192. this cannot be the beginning of a transmission from the PC.
  193. 4.3. Interface Serial Data Buffer.
  194. The buffer consists of 10 bytes defined as follows:
  195. Byte Function
  196. 0 Upload Buffer Size
  197. 1 Function / Address Mask
  198. 2 Data Byte #0
  199. 3 Data Byte #1
  200. 4 Data Byte #2
  201. 5 Data Byte #3
  202. 6 Data Byte #4
  203. 7 Data Byte #5
  204. 8 Data Byte #6
  205. 9 Data Byte #7
  206. The interface will only upload the specified number of bytes within
  207. the buffer, and will not default to uploading 10 bytes in every
  208. transmission. The number of bytes to receive is thus specified in byte
  209. 0 of the transmission. The counting of the number of bytes starts at
  210. the mask (shown as byte 1).
  211. The function address mask indicates whether the following 8 bytes
  212. should be interpreted as an address or as a function. The position of
  213. the bit in the mask corresponds to the Data byte index within the data
  214. buffer. If the bit is set (1), the data byte is defined as a function,
  215. and if reset (0), the byte is an address. Bit 0 coresponds to Data Byte 0.
  216. The data bytes are in the same format as for the Code byte in the X-10
  217. transmissions (i.e. Housecode:Device Code or Housecode:Function).
  218. Note that once the data buffer has been uploaded, there is no
  219. acknowledgment from the PC to the interface as the contents of the
  220. serial data buffer will have been changed. This will not cause a problem
  221. as this is simply informing the PC of the external status, rather than
  222. controlling a device (as in the case of the PC transmission) which may
  223. have safety implications.
  224. 4.4. Dim or Bright.
  225. After a dim or bright code, the PC will expect the following byte to be
  226. the change in brightness level. An X-10 module has 210 discrete
  227. brightness levels, and therefore this byte will be equivalent to a
  228. brightness change of n/210*100%.
  229. 4.5. Extended Code.
  230. Extended code is processed in a similar way to Dim and Bright, except
  231. that the PC will expect two bytes, which are the Data and Command
  232. bytes.
  233. 4.6. Example.
  234. PC Interface Description
  235. 0x5a Poll from interface.
  236. 0xc3 'PC Ready' Response from PC
  237. 0x06 6 byte transmission
  238. 0x04 xxxx x100-> byte 0,1 addresses,
  239. 2 function
  240. 0xe9 B6
  241. 0xe5 B7
  242. 0xe5 B Bright
  243. 0x58 0x58/210 * 100%
  244. This transmission will wake the computer, and then indicate that a
  245. transmission of length 5 bytes will occur, data bytes 0 and 1 are
  246. addresses and byte 2 is a bright function, which means that the
  247. following byte is the change in brightness level.
  248. 5. Fast Macro Download.
  249. The interface contains a 42 byte buffer which contains macro codes.
  250. These macro codes are initiated upon the reception of a pre-defined
  251. address (i.e. B7), and the code specifies the transmissions that the
  252. interface should then make. Due to the shortage of bytes, the macro code
  253. is 'compressed' by grouping similar functions.
  254. Note, any error in the function codes may result in the interface
  255. entering an endless loop and becoming 'locked-up', so steps should be
  256. taken to ensure that the code is correct prior to transmission.
  257. If the interface detects that it has suffered a power-down situation, it
  258. will ring the PC and poll with a specialized code to indicate that the
  259. macros must be refreshed.
  260. 5.1. Power-fail Macro Download Poll Code.
  261. NOTE: I beleive that this is mainly for the CP10. The battery
  262. backed CM11 does send this poll after a power failure, but it
  263. responds to a setclock directive rather than the macro download.
  264. It waits till the resumption of power before it starts sending this byte.
  265. DBS, Jan 1, 1997
  266. In order to poll the PC, the interface will continually send:
  267. Poll: 7 6 5 4 3 2 1 0
  268. Value: 1 0 1 0 0 1 0 1 (0xa5)
  269. This signal will be repeated once every second until the PC responds with
  270. a clock update ( 0x9b see section 8).
  271. 5.2. PC Response to Macro Download Poll Code.
  272. To stop the polling, the PC must respond with:
  273. PC Response: 7 6 5 4 3 2 1 0
  274. Value : 1 1 1 1 1 0 1 1 (0xfb)
  275. Once this has been transmitted, the macro must be immediately
  276. downloaded. At this stage, the interface will wait until the 42 byte
  277. macro has been received before any X-10 transmissions can occur.
  278. 5.3. Macro Code (CM10).
  279. Macro code is divided into individual macros, and functional groups
  280. within the macros. The only limit to the number of macros and groups is
  281. the number of available storage bytes.
  282. Each macro begins with an initiator byte which details the Housecode and
  283. Device code that will cause the macro to start.
  284. Following the initiator byte is the length of this current macro, and
  285. the functional trigger (ie On or Off functions). The length is defined
  286. by the lower 7 bits, and the functional trigger by the most significant
  287. bit. If the most significant bit is set, the functional trigger is 'On',
  288. and if reset, the functional trigger is 'Off'.
  289. As mentioned previously, the macro is divided into functional groups,
  290. and each group has a byte indicating the length of the group before the
  291. macro is defined. This group length byte is exclusive of the function
  292. code.
  293. The group is then made up of a common housecode (1 nibble), followed by
  294. a number of device codes (each takes 1 nibble) and finally a function
  295. code (1 nibble). If the function code falls on a byte boundary, then it
  296. is always the low nibble of the byte.
  297. All unused bytes must take a value of 0x00.
  298. 5.3.1. Dimming and Brightening within a macro.
  299. If the function is a bright or dim, then the next byte specifies the
  300. change in brightness level in 22 steps. Note if the most significant bit
  301. of this byte is set, the interface will send out enough bright commands
  302. to ensure that the associated lamps are at 100%, and then dim the lamp
  303. by the specified value.
  304. 5.3.2. Extended codes in macros.
  305. Extended code cannot be grouped as for other functions, and consequently
  306. an extended code group would be defined as:
  307. Byte Description
  308. 0x01 Group length
  309. 0xa7 Housecode D (1010 = D), Extended code function
  310. 0x03 Device code 11 (0011 = 11)
  311. 0xff Data byte: 0xff
  312. 0x55 Command byte: 0x55
  313. 5.3.3. Checksum.
  314. Once the macro has been downloaded, the interface calculates the 1 byte
  315. checksum by summing all 42 bytes of the macro code (not including the PC
  316. macro download start byte) and returns the appropriate value. If the
  317. value is incorrect, the PC should again initiate the macro download by
  318. transmitting the PC macro download start byte.
  319. 5.3.4. Example.
  320. PC Interface Description
  321. 0xa5 Power-fail, macro poll.
  322. 0xfb Macro download start byte
  323. 0x26 Initiator C1
  324. 0x0a Functional Trigger: 'Off';
  325. Macro length: 10 bytes
  326. 0x04 Group length: 4 nibbles
  327. 0x66 Macro housecode, A, device 1
  328. 0x2e Devices 2 and 3
  329. 0x04 Dim
  330. 0x0b Dim by 11/22*100% = 50%
  331. 0x02 group length: 2 nibbles
  332. 0x6a Macro housecode, A, device 4
  333. 0x02 Function: On
  334. 0x26 Initiator C1
  335. 0x8c Functional Trigger: 'On';
  336. Macro length: 12 bytes
  337. 0x02 Group length: 2 nibbles
  338. 0x66 Macro housecode, A, device 1
  339. 0x02 Function: On
  340. 0x03 Group length: 3 nibbles
  341. 0x6e Macro housecode, A, device 2
  342. 0x42 Device 3, Function Dim (0100)
  343. 0x06 Dim by 6/22*100% = 27%
  344. 0x02 Group length: 2 nibbles
  345. 0x6a Macro housecode, A, device 4
  346. 0x03 Function: Off
  347. 0x00... Remaining 20 bytes set to 0x00
  348. 0x91 Macro checksum: 0x91
  349. 0x00 Checksum correct
  350. 0x55 Interface ready
  351. 5.4. EEPROM Code (CM11 and CP10).
  352. The EEPROM code for the CM11 and CP10 contains both the downloaded
  353. timers and also the macro data. The timers are resolved into 'pseudo-
  354. macros' with the only difference being in the initiator (ie a timer as
  355. opposed to a macro code).
  356. In other words, a timer points to a macro. The timer initiator table is
  357. checked every minute to see if any of the entrys should trigger
  358. a macro. Macro initiators, on the other hand, are checked anytime an
  359. X10 signal is detected over the power lines.
  360. The EEPROM may be broken down into four categories:
  361. Macro Offset (two bytes)
  362. Timer Initiators (continues until an 0xff byte)
  363. Macro Initiators (continues to start of macro offset)
  364. Macro Data.
  365. 5.4.1. Macro Offset.
  366. The first two bytes of the EEPROM contain an offset to the macro
  367. initiator table. The macro initiator table is offset rather than the
  368. timers as the timers must be processed every minute, whereas the macros
  369. are only processed whenever an X-10 transmission event is detected.
  370. 5.4.2. Timer Initiator.
  371. The timers reside in a table beginning at address 0x0002 in the EEPROM.
  372. The table is terminated by a 0xff at the end of the table. Each 9-byte
  373. timer entry contains the following data:
  374. Bit range Description
  375. 71 Reserved
  376. 70 to 64 Day of the week mask (bit 1 = Sunday, bit 7 = Saturday)
  377. 63 to 56 Start day range (day of the year) bits 0 to 7)
  378. 55 to 48 Stop day range (bits 0 to 7)
  379. 47 to 44 Event start time x 120 minutes
  380. 43 to 40 Event stop time x 120 minutes
  381. 39 Start day range (bit 8)
  382. 38 to 32 Event start time (0 to 120 minutes, bits 0 to 6)
  383. 31 Stop day range (bit 8)
  384. 30 to 24 Event stop time (0 to 120 minutes, bits 0 to 6)
  385. 23 Start event security mode.
  386. 22 Reserved
  387. 21 to 20 Start event macro pointer (bits 8 to 9)
  388. 19 Stop event security mode.
  389. 18 Reserved
  390. 17 to 16 Stop event macro pointer (bits 8 to 9)
  391. 15 to 8 Start event macro pointer (bits 0 to 7)
  392. 7 to 0 Stop event macro pointer (bits 0 to 7)
  393. The day of the week and day of the year are ANDed, so both have to match the
  394. current time before the event will trigger a macro.
  395. The event macro pointer has the address of the macro that will be executed
  396. when this event is triggered.
  397. If the security mode bit is set, the CM11a will add a time varying from
  398. 0 to 60 minutes to the event time.
  399. Note: If the times for the start and stop events in a given timer are
  400. the same, then only the start event will occur and the stop event
  401. will be ignored.
  402. 5.4.3. Macro Initiator.
  403. The macro initiators are configured thus:
  404. Bit range Description
  405. 23 to 20 Initiator house code
  406. 19 to 16 Initiator device code
  407. 15 Initiator function ('1' = on, '0' = off)
  408. 14 to 12 Reserved (See Section 7.)
  409. 11 to 0 Macro pointer (bits 0 to 11)
  410. The table of macro initiators is terminated with two bytes of 0xff.
  411. 5.4.4. Macro data.
  412. Macro data starts with a timer offset in minutes (0 for instant to 240
  413. for 4 hours) relative to the timer value. Following the timer offset
  414. is the number of elements within the macro (1 to 255). This is
  415. followed by the macro elements themselves:
  416. Packet = delay:number_elements:macro_element(data)
  417. The macro elements are configured as follows:
  418. Basic command:
  419. Bit range Description
  420. 23 to 20 Command house code
  421. 19 to 16 Command function
  422. 15 to 0 X10 format device bitmap
  423. Bright or dim commands:
  424. Bit range Description
  425. 31 to 28 Command house code
  426. 27 to 24 Command function
  427. 23 to 8 X10 format device bitmap
  428. 7 Brighten first ('1') or simply dim ('0')
  429. 6 to 5 Reserved
  430. 4 to 0 Dim value (ranging from 0 to 22)
  431. Extended data commands:
  432. Bit range Description
  433. 47 to 44 Command house code
  434. 43 to 40 Command function
  435. 39 to 24 X10 format device bitmap
  436. 23 to 0 Extended code data
  437. The above should have been titled "Extended Code commands" instead of
  438. "Extended data commands". The "Extended Data Transfer" command (0x0C)
  439. is only a 3 byte Basic macro element (and as a macro element transfers
  440. no data). Macro elements for Extended Code commands are programmed
  441. thus:
  442. Bit range Description
  443. 47 to 44 Command house code
  444. 43 to 40 Command function (0x7)
  445. 39 to 24 X10 format device bitmap
  446. 23 to 16 Unit code (in lower nybble)
  447. 15 to 8 Data byte
  448. 7 to 0 Extended type|command function
  449. The Extended Code commands are understood by modules such as the
  450. LM14A two-way lamp module. For a detailed description of the
  451. extended type|command functions, see X10 document XTC798.DOC
  452. which is available from their website. (CWS May 19, 2003)
  453. Setting the X10 format device bitmap to 0 will suppress transmission
  454. of the Housecode|Unitcode address byte for those commands where this
  455. byte is superfluous, e.g., the "All Lights On" command and (most)
  456. Extended Code commands. (For whatever reason, Activehome sets the
  457. bitmap to 0x0001, which corresponds to unit 13.) (CWS May 19, 2003).
  458. 5.4.5. EEPROM Data Transfer.
  459. The EEPROM is downloaded to the interface in blocks of 19 bytes. The
  460. first byte is the macro download initiator command byte (0xfb), followed
  461. by two bytes containing the actual EEPROM address (this does not need to
  462. be sequential, although it must not cross the 16 bit page boundary). 16
  463. bytes of EEPROM data follows the EEPROM address.
  464. Once the interface has received the EEPROM data, it will return a
  465. checksum. If the checksum is correct, the PC will acknowledge (0x00) and
  466. after the data has been programmed into the EEPROM, the interface will
  467. return a 'ready' command (0x55) to indicate that it is available to
  468. process PC requests.
  469. 5.4.6. Example.
  470. PC Interface Description
  471. 0xfb EEPROM download start byte
  472. (first block of data)
  473. 0x00 EEPROM address 0x0000 (lo byte)
  474. 0x00 (hi byte)
  475. 0x00 EEPROM offset to macro initiators 0x000c
  476. 0x0c (hi byte)
  477. 0x3e Day mask x 0111110 (.FTWTM.)
  478. 0x00 Start day [0..7]
  479. 0x6d Stop day [0..7]
  480. 0x49 (Event start time, Event stop time)
  481. x 120 minutes
  482. 0x00 Start day range [8],
  483. Event start time [0..6]
  484. 0x80 Stop day range [8],
  485. Event stop time [0..6]
  486. 0x00 Start macro pointer [8..11], Stop
  487. macro pointer [8..11]
  488. 0x1d Start macro pointer [0..7]
  489. 0x22 Stop macro pointer [0..7]
  490. Summary: Start day: 0x000 (Jan 1)
  491. Stop day: 0x16d (Dec 31)
  492. Start time: 4 x 120mins = 08:00
  493. Stop time: 9 x 120mins = 18:00
  494. Start macro pointer: 0x01d
  495. Stop macro pointer: 0x022
  496. 0xff Timer table delimiter
  497. 0x6a Macro initiator house and device
  498. code (A4)
  499. 0x80 Macro function (On)
  500. 0x11 Macro pointer (0x011)
  501. 0xff
  502. 0xb8 Checksum from the interface
  503. 0x00 Checksum correct
  504. 0x55 Programming complete. Interface ready.
  505. 0xfb Second block of data
  506. 0x00 EEPROM start address (lo byte)
  507. 0x10 EEPROM start address (hi byte)
  508. 0xff Macro table delimiter
  509. 0x00 Macro: instant
  510. 0x01 1 element
  511. 0x64 House code A, function Dim
  512. 0x00
  513. 0x40 Bitmap: device #1
  514. 0x0b Dim level 11/22 = 50%
  515. 0x0f Macro: delayed by 15 minutes
  516. 0x01 1 element
  517. 0x64 House code A, function Dim
  518. 0x00
  519. 0x40 Bitmap: device #1
  520. 0x80 Brighten to 100%
  521. 0x00 Macro: instant
  522. 0x01 1 element
  523. 0x62 House code A, function On
  524. 0x56 Checksum from the interface
  525. 0x00 Checksum correct
  526. 0x55 Programming complete
  527. 0xfb Third block of data
  528. 0x00
  529. 0x20 EEPROM start address
  530. 0x00
  531. 0x04 Bitmap: device #3
  532. 0x00 Macro: instant
  533. 0x01 1 element
  534. 0x63 House code A, function Off
  535. 0x00
  536. 0x04 Bitmap: device #3
  537. 0x00 Zero pad for remainder
  538. of the data stream
  539. 0x00
  540. 0x00
  541. 0x00
  542. 0x00
  543. 0x00
  544. 0x00
  545. 0x00
  546. 0x00
  547. 0x8c Checksum from the interface
  548. 0x00 Checksum correct
  549. 0x55 Programming complete
  550. 6. Serial Ring Disable
  551. If may be required, for the sake of 'trouble-shooting' to disable the
  552. serial ring (RI) signal, although undesirable as macros held within the
  553. computer will not operate, nor will the computer be able to track the
  554. system status.
  555. The following protocol will allow the serial ring (RI) signal to be
  556. enabled and disabled:
  557. Enable Ring:
  558. PC Interface Description
  559. 0xeb Enable the ring signal
  560. 0xeb Checksum
  561. 0x00 Checksum correct
  562. 0x55 Interface ready
  563. Disable Ring:
  564. PC Interface Description
  565. 0xdb Disable the ring signal
  566. 0xdb Checksum
  567. 0x00 Checksum correct
  568. 0x55 Interface ready
  569. The default state of the serial ring (RI) signal after a power on reset
  570. is enabled.
  571. 7. EEPROM Address (executed via timer or macro initiator).
  572. This command is purely intended for the CM11 and CP10.
  573. When the interface receives a fast macro initiator, or when a timer
  574. event is processed, it will immediately perform an asynchronous
  575. transmission of the EEPROM address that is subsequently processed.
  576. The command is of the form:
  577. 0x5b EEPROM address transmission
  578. 0xhh High byte of macro EEPROM address (*)
  579. 0xll Low byte of macro EEPROM address
  580. (*) Bit 7 of this byte is always 1. Bits 4-6 replicate the
  581. "reserved" bits 12-14 (Section 5.4.3) when the transmission
  582. results from a Macro Initiator or are 0 when from a Timer.
  583. Only bits 0-1 are the high part of the EEPROM address.
  584. (CWS Mar 7, 2004)
  585. This transmission is a one time transmission, and requires no
  586. hand-shaking as the interface may not be connected to the PC.
  587. 8. Set Interface Clock.
  588. This command is purely intended for the CM11 and CP10.
  589. The PC can set the interface clock with an unsolicited transmission at
  590. any time. In addition, once the interface detects the absence of power,
  591. it will request the current time from the PC when the PC is available as
  592. follows:
  593. CM11:
  594. For a CM11, the time request from the interface is: 0xa5.
  595. The PC must then respond with the following transmission
  596. Note: The bit range is backwards from what you'd expect in serial
  597. communications. Bit 55-48 is actually the first byte transmitted,
  598. etc. To make matters worse, the bit orientation is correct within
  599. the bit range, IE bits 4-7 of byte 6 _IS_ the monitored house code.
  600. Further, bits 0 and 1 of byte 6 appear to be flipped. I get a
  601. "monitor status clear" if bit 0 is set.
  602. The original docs had bit 23 as part of current hours AND day.
  603. DBS Jan 1, 1997
  604. Descriptions of bits 0-3 are now correct as shown below.
  605. CWS Sep 1, 2002
  606. Bit range Description
  607. 55 to 48 timer download header (0x9b) (byte 0)
  608. 47 to 40 Current time (seconds) (byte 1)
  609. 39 to 32 Current time (minutes ranging from 0 to 119) (byte 2)
  610. 31 to 24 Current time (hours/2, ranging from 0 to 11) (byte 3)
  611. 23 to 15 Current year day (MSB is bit 15) (byte 4+.1)
  612. 14 to 8 Day mask (SMTWTFS) (byte 5-.1)
  613. 7 to 4 Monitored house code (byte 6...)
  614. 3 Reserved
  615. 2 Timer purge flag
  616. 1 Battery timer clear flag
  617. 0 Monitored status clear flag
  618. The CM11a will not respond to any other transmission until its time
  619. request is satisfied. Per Buzz Burrowes, sending just the header (0x9b)
  620. followed by some indeterminate delay of the order of 10 milliseconds
  621. is sufficient to satisfy the time request without having to modify the
  622. clock setting. (CWS May 19, 2003)
  623. CP10:
  624. For a CP10, the time request is from the interface is: 0xa6.
  625. The PC must then respond with the following transmission
  626. Note: same as for the CM11.
  627. Bit range Description
  628. 63 to 56 Timer download header (0x7sb)
  629. 55 to 48 Current time (seconds)
  630. 47 to 40 Current time (minutes ranging from 0 to 119)
  631. 39 to 32 Current time (hours/2, ranging from 0 to 11)
  632. 31 to 23 Current year day
  633. 22 to 16 Day mask (SMTWTFS)
  634. 15 to 12 Monitored house code
  635. 11 Reserved
  636. 10 Battery timer clear flag
  637. 9 Monitored status clear flag
  638. 8 Timer purge flag
  639. 7 to 4 Power strip house code
  640. 3 to 0 Power strip device code
  641. 9. Status Request.
  642. This command is purely intended for the CM11 and CP10.
  643. The PC can request the current status from the interface at any time as
  644. follows:
  645. CM11:
  646. For a CM11, the status request is: 0x8b.
  647. The status request is immediately followed by:
  648. Note: This is really interesting. The btye order is reversed per
  649. the note in section 8. The last 3 bytes are each mapped to show a
  650. 1 in the bit position if the unit with value equating to the nibble
  651. (section 1) is set. Low byte comes first, hi byte second.
  652. Example: if unit 1 is on, the nibble = 6, so the mask
  653. would show 00...0100000
  654. Note also that the hi bit of byte 6 must be multiplied by 256 and added to
  655. the decimal value of byte 5 (+1) to find the Julian date.
  656. DBS Jan 1, 1997
  657. The battery timer "(set to 0xffff on reset)" below refers to a "cold"
  658. restart, i.e, if the interface has been disconnected from AC power _and_
  659. the batteries have been removed for some indeterminate period of time.
  660. When this condition occurs, it is necessary to send a status update with
  661. the battery timer clear bit set, whereupon the timer will be reset
  662. to 0000 and start to respond to interruptions in AC power, incrementing
  663. by minutes of operation on battery power.
  664. CWS Sep 1, 2002
  665. Bit range Description
  666. 111 to 96 Battery timer (set to 0xffff on reset) (Byte 0-1)
  667. 95 to 88 Current time (seconds) (Byte 2 )
  668. 87 to 80 Current time (minutes ranging from 0 to 119) (Byte 3)
  669. 79 to 72 Current time (hours/2, ranging from 0 to 11) (Byte 4)
  670. 71 to 63 Current year day (MSB bit 63) (Byte 5+)
  671. 62 to 56 Day mask (SMTWTFS) (Byte 6-)
  672. 55 to 52 Monitored house code (Byte 7 lo)
  673. 51 to 48 Firmware revision level 0 to 15 (Byte 7 hi)
  674. 47 to 32 Currently addressed monitored devices (Byte 8-9)
  675. 31 to 16 On / Off status of the monitored devices (Byte 10-11)
  676. 15 to 0 Dim status of the monitored devices (Byte 12-13)
  677. CP10:
  678. For a CP10, the status request is: 0x6b.
  679. The status request is immediately followed by:
  680. Bit range Description
  681. 119 to 104 Battery timer (set to 0xffff on reset)
  682. 103 to 96 Current time (seconds)
  683. 95 to 88 Current time (minutes ranging from 0 to 119)
  684. 87 to 80 Current time (hours/2, ranging from 0 to 11)
  685. 79 to 71 Current year day
  686. 70 to 64 Day mask (SMTWTFS)
  687. 63 to 60 Monitored house code
  688. 59 to 56 Firmware revision level 0 to 15
  689. 55 to 48 Power strip house and device code
  690. 47 to 32 Currently addressed monitored devices
  691. 31 to 16 On / Off status of the monitored devices
  692. 15 to 0 Dim status of the monitored devices
  693. 10. Power-up Timer.
  694. This command is purely intended for the CP10.
  695. The interface contains a power-up timer that will turn on the remote
  696. controlled sockets once it elapses on the assumption that the computer
  697. has failed to boot-up. If it receives a message ('Relay Open' or 'Relay
  698. Close', see item 7) from the computer before the timer elapses, then the
  699. time-out is canceled and the sockets configured in accordance with the
  700. message.
  701. The power-up timer is the fifth byte of the six byte transmission for
  702. the scheduled ring, and it is split into two nibbles. The upper nibble
  703. is a reload value and the lower nibble is the actual timer. Each timer
  704. tick is 2 seconds, so the maximum timer value is 30 seconds.
  705. 10.1. Transmission Protocol
  706. The PC can define the delay after which the power strip will turn the
  707. controllable outlets on and off after detecting the PC turning on and
  708. off.
  709. Bit range Description
  710. 55 to 48 Power-up timer download header (0xcb)
  711. 47 to 40 Reserved (0x00)
  712. 39 to 32 Reserved (0x00)
  713. 31 to 24 Reserved (0x00)
  714. 23 to 16 Reserved (0x00)
  715. 15 to 12 Power-up time-out (multiples of 2 seconds, range = 0 to 30s)
  716. 11 to 8 Reserved (0x0)
  717. 7 to 4 Power-down time-out (multiples of 2 seconds, range = 0 to 30s)
  718. 3 to 0 Reserved (0x0)
  719. The interface will respond with a checksum excluding the header. If
  720. correct the PC should respond with 0x00, or download the correct value
  721. again. The interface will terminate the transfer with 0x55 indicating
  722. that it is ready to communicate with the PC.
  723. 11. Relay Control.
  724. This command is purely intended for the CP10.
  725. The power-strip contains a relay that controls four extension sockets.
  726. These sockets are controllable via the PC with the following commands:
  727. Close Relay (sockets on):
  728. PC Interface Description
  729. 0xab Close the relay
  730. 0xab Checksum
  731. 0x00 Checksum correct
  732. 0x55 Interface ready
  733. Open Relay (sockets off):
  734. PC Interface Description
  735. 0xbb Open the relay
  736. 0xbb Checksum
  737. 0x00 Checksum correct
  738. 0x55 Interface ready
  739. 12. Input Filter Fail.
  740. This command is purely intended for the CP10.
  741. The power-strip contains an input filter and electrical surge protection
  742. that is monitored by the microcontroller. If this protection should
  743. become compromised (i.e. resulting from a lightening strike) the
  744. interface will attempt to wake the computer with a 'filter-fail poll'.
  745. This poll signal takes the form:
  746. Poll: 7 6 5 4 3 2 1 0
  747. Value: 1 1 1 1 0 0 1 1 (0xf3)
  748. The poll signal will be repeated to the PC every second until the PC
  749. responds with the default poll response:
  750. PC Response: 7 6 5 4 3 2 1 0
  751. Value: 1 1 1 1 0 0 1 1 (0xf3)
  752. 13. Hail Commands (DBS)
  753. The Hail commands are set up so that you can detect other X10 controllers
  754. that are on the same powerline as your controller and so that you can tell
  755. the other controllers which house codes you are using.
  756. The hail protocol has two parts. First is the hail request (REQ) which
  757. asks for other controllers to identify themselves. Second is the hail
  758. acknowlege (ACK), which is sent by the other controllers in response to
  759. the hail req.
  760. The CM11A does not automatically respond to the hail request. It must be done
  761. by software. Activehome does this (or at one time did it - CWS) for the
  762. Windows based systems.
  763. The ACK should contain the house code that you have active. If you have
  764. several house codes, you could reply with all of them, one after the other.
  765. The transmisison for both ACK and REQ are one byte of function data in
  766. the standard hc:function format. See section 4.3 for the serial data buffer
  767. format.
  768. The REQ command appears to use any house code. The ACK should have the
  769. house code set to the house code you are using.